The mechanism
Architecture turns a computation graph into a repeatable organization of execution units, storage levels, interconnects and control. A CPU, GPU, TPU, FPGA, NPU or wafer-scale array realizes similar mathematical operations through different communication patterns and scheduling rules. The CRG view asks which state is retained, where it moves, who controls it, and what happens when a path is full or a unit fails. Architecture is therefore a contract: software assumes a set of behaviors, while implementation must satisfy those behaviors within power, area, timing, test and manufacturing limits.
- Extract operator shapes, precision, reuse and synchronization from the workload.
- Choose an execution model and dataflow that expose useful parallelism.
- Allocate registers, local storage, shared memory and external memory roles.
- Specify communication, ordering, fault and recovery behaviors.
- Pass the contract to the compiler, RTL and physical-design teams.
Science and assumptions
Workload-bound rate
Compatible work rate is bounded by the smallest arithmetic, memory-delivery and network-delivery rate after each is expressed on the same operation basis.
If the desired output is tasks/s rather than operations/s, normalize all three bounds by the same declared operations per task before comparison.
Symbols and units
- R
- Compatible arithmetic/work rate under the declared operation convention
operations/s
- P_compute
- Arithmetic capacity in that same convention
operations/s
- B_memory
- Useful memory payload bandwidth
bytes/s
- I
- Useful operations per byte crossing the memory boundary
operations/byte
- B_network
- Useful network payload bandwidth
bytes/s
- I_net
- Useful operations per byte crossing the network boundary
operations/byte
A simple bound compares arithmetic capacity with memory and network delivery capacity after expressing each as a compatible workload rate.
Assumptions Peak terms, arithmetic intensity and network intensity share a precision, batch and time boundary.
Engineering example
A tensor kernel with low arithmetic intensity may remain memory-bound on a larger accelerator. Changing tile reuse or placing data closer to the unit can raise useful rate without changing the mathematical graph.
Distinctions and tradeoffs
An architecture label does not determine workload performance without a compiler path, memory behavior, topology and operating boundary.
More specialization can improve efficiency for a stable graph while reducing flexibility and increasing software or qualification effort.
The architecture determines whether model-scale tensor traffic becomes useful work or a queue of waiting memory and communication requests.
Specifications and interfaces
- Contract axes
- Execution, storage, communication, control, recovery
A comparison must use the same workload and boundary.
- Unknowns
- Undisclosed internal structures remain unknown
Public architecture claims are not reverse-engineered geometry.
Interfaces
- Workload graph Input
- Operators, shapes, precision and dependencies
- Implementation plan Output
- Units, memory hierarchy, links, schedules and budgets
Check your understanding
What does the architecture contract connect?
- Only the transistor count and logo
- The workload’s required state transitions with execution, storage and communication behavior
- Only a benchmark score
Answer and reasoning
The workload’s required state transitions with execution, storage and communication behavior
Architecture defines how the computation can be carried by a machine under its physical and software constraints.
Evidence and scope
The bound is a roofline-style teaching model. Public architecture documentation supplies examples, not a universal product ranking.
Use the manufacturing investigation to trace compatible inputs, assembly and operating constraints; no current standalone calculator models this lesson’s full mechanism.