CoWoS-S and the silicon interposer route

The mechanism

CoWoS-S is a TSMC integration route built around a silicon interposer. Logic dies and separately manufactured HBM stacks meet on that fine-routing structure, which then connects to a package substrate. The interposer is a fabricated component with wiring and vertical connections; it is not the same object as the accelerator die or the organic substrate. Its area, routing, test status and assembly requirements enter the package plan. The process graph therefore converges several supply paths instead of showing HBM emerging from the logic wafer. The cross-section preserves each input’s identity through joining and final package test.

Fabricate and inspect the silicon interposer and its routing/vertical connection structures.
Manufacture and screen logic dies and memory stacks on their separate upstream routes.
Align and join components to compatible interposer locations using the selected assembly process.
Connect the integrated assembly to the package substrate and complete mechanical/thermal structures.
Test the final package and retain die, memory and interposer genealogy for failures.

Science and assumptions

Convergent assembly ceiling

N_{\mathrm{packages}}\le\min\!\left(\frac{N_{\mathrm{logic}}}{l},\frac{N_{\mathrm{HBM}}}{h},N_{\mathrm{interposer}},N_{\mathrm{substrate}},C_{\mathrm{assembly}}\right)

Supported packages are bounded by the smallest compatible input stream after logic and HBM counts are converted to packages, and by assembly capacity over the same interval.

Symbols and units

N_packages: Packages supportable during the selected interval
packages
N_logic: Available good compatible logic dies
dies
l: Logic dies required per package
dies/package
N_HBM: Available good compatible memory stacks
stacks
h: HBM stacks required per package
stacks/package
N_interposer: One-interposer-per-package compatible input count
package-equivalent inputs
N_substrate: One-substrate-per-package compatible input count
package-equivalent inputs
C_assembly: Assembly starts possible during the same interval
packages

N terms count available good compatible inputs; l and h are logic dies and HBM stacks required per package; $C_{\mathrm{assembly}}$ uses packages over the same interval.

Assumptions A resource ceiling before new assembly losses, qualification, scheduling and inventory constraints; it is not a yield forecast.

Engineering example

Synthetic week: 100 logic dies, 320 good HBM stacks and four stacks/package permit at most 80 packages before other constraints, even if 100 interposers and substrates are ready.

Distinctions and tradeoffs

HBM is not made after the logic die as a continuation of the same wafer process; its manufacturing path converges at integration.

A shared dense routing plane supports many connections but requires interposer fabrication and high-value multi-component assembly.

The interposer enables many short parallel connections between compute and HBM; package supply still depends on every converging input.

Specifications and interfaces

Routing structure: Silicon interposer
Distinct from active logic, HBM stacks and organic substrate.
Assembly inputs: Good logic + good memory + interposer + substrate
Counts require compatible product configurations and timing.

Interfaces

Screened components Input: Logic, HBM, interposer and substrate with compatible interfaces
Integrated package Output: Fine die-to-memory routing and a board-facing package interface

Check your understanding

If logic dies are plentiful but compatible HBM stacks are scarce, what constrains package output?

The required HBM stack supply can become the binding input
Only the logic wafer-start rate
The silicon atom count of the substrate

Answer and reasoning

The required HBM stack supply can become the binding input

Each finished package consumes a complete compatible set of components.

Evidence and scope

TSMC’s public page establishes route identity. Exact process order, materials and customer allocation are not fully public.

Use the manufacturing investigation to trace compatible inputs, assembly and operating constraints; no current standalone calculator models this lesson’s full mechanism.