Source/drain, spacers, contacts and MOL

The mechanism

The channel cannot drive a circuit until carriers can enter and leave through low-resistance regions and contacts. Source/drain engineering sets doping, geometry and sometimes strain; spacers separate parts of the gate and neighboring structures; contact processing creates an electrical connection to local wiring. The middle of line, or MOL, links these device terminals to the interconnect hierarchy. Smaller contacts can increase resistance and make alignment and interface preparation more difficult. This lesson treats the channel, source/drain and contact as a series path, showing why improving a transistor’s intrinsic channel does not guarantee the same improvement in a finished logic cell.

Form source/drain regions with the required geometry and electrical activity.
Preserve spacer isolation and the intended relationship between gate and terminal regions.
Open contact regions and prepare the semiconductor/conductor interface.
Deposit and pattern contact materials while controlling voids, alignment and nearby dielectric damage.
Measure contact chains and device behavior to separate channel improvement from external series resistance.

Science and assumptions

First-order contact scaling

R_c\approx\frac{\rho_c}{A},\qquad R_{\mathrm{path}}\approx R_{\mathrm{channel}}+R_{\mathrm{access}}+R_{\mathrm{contacts}}

Contact resistance is approximately specific contact resistivity divided by area. The complete path also includes channel, access-region and combined contact resistance.

Symbols and units

R_c: One contact resistance under uniform injection
Ω
ρ_c: Specific contact resistivity
Ω·m²
A: Conducting contact area
m²
R_path: Total selected resistive path
Ω
R_channel: Channel contribution
Ω
R_access: Access-region contribution
Ω
R_contacts: Combined contacts contribution
Ω

R terms use Ω, specific contact resistivity ρ_c uses Ω·m² and contact area A uses m².

Assumptions Uniform-current interface approximation; current crowding and transfer length can invalidate simple inverse-area scaling.

Engineering example

Synthetic series path: 50 Ω channel plus 50 Ω combined access/contact resistance totals 100 Ω. Halving only channel resistance yields 75 Ω, a 25% total reduction rather than 50%.

Distinctions and tradeoffs

A lower-resistance channel cannot remove resistance introduced by its access regions and contacts.

Larger contacts can reduce resistance while consuming area and tightening nearby routing or spacing constraints.

Contact and access resistance can consume voltage and delay budgets before signals reach the accelerator’s larger interconnect network.

Specifications and interfaces

Contact metric: Specific contact resistivity, Ω·m² or Ω·cm²
Area-normalized interface property; do not confuse it with contact resistance in Ω.
Integration boundary: FEOL terminal → MOL → BEOL
Exact naming boundaries vary by technology.

Interfaces

Device terminals Input: Doped semiconductor, spacers and exposed contact surfaces
Local electrical connections Output: Contacts and local wires with controlled resistance and isolation

Check your understanding

Why can a better intrinsic transistor show only a small circuit-speed improvement?

Contact resistance is always zero
The source and drain never connect to wires
External series resistance and circuit load may dominate

Answer and reasoning

External series resistance and circuit load may dominate

A finished path includes the channel, access regions, interfaces and wires, each with its own contribution.

Evidence and scope

No proprietary contact metal, anneal or resistance target is supplied. Product-specific interfaces require measured structures.

Use the manufacturing investigation to trace compatible inputs, assembly and operating constraints; no current standalone calculator models this lesson’s full mechanism.