{"id":"iommu-buffer-identity","name":"IOMMU permission and tensor identity","shortName":"A permitted address can still be wrong","role":"Distinguish protection validity from the semantic identity of a matrix operand.","description":"A translation unit can reject an absent or disallowed device address, but that check alone cannot establish that a driver supplied the intended tensor. The runtime must also preserve the association between a logical operand and its physical storage. This distinction is visible when the B descriptor points through a permitted mapping to A. Every transferred word is readable, arithmetic proceeds, and the device reports completion. Yet it has computed A squared rather than A times B. Removing B’s mapping instead yields a protection failure and supplies no B operand. Comparing the two cases prevents a common diagnostic shortcut: the absence of an address fault does not prove a computation used the right data. The teaching checker applies exact range, access-direction and epoch conditions; its semantic oracle separately compares the produced matrix with the declared operation.","mechanism":["Each device range has a base, byte length, physical target, read/write permission and current epoch.","A DMA request must fit completely within exactly one permitted range of the current epoch.","A missing B range rejects its first read after A has already transferred; arithmetic receives no B values.","The wrong-mapping specimen redirects B to A while preserving readable permissions.","Device MACs use those delivered words and therefore compute the operation implied by the wrong data.","Only a separate operand-identity or result check reveals the semantic mismatch; the protection mechanism is not a tensor verifier."],"prerequisites":["process-dma-address-spaces"],"related":["runtime-device-dispatch","dma-visibility-ownership","sharded-matmul-ownership"],"specs":[{"label":"Protection checks","value":"Range, direction, current epoch","context":"A model of declared byte regions, not a real hardware page-table encoding."},{"label":"Wrong alias","value":"Logical B → physical A","context":"Readable but not the intended tensor."},{"label":"Missing range","value":"B read blocked before arithmetic","context":"The sixteen A bytes already transferred are still counted."}],"interfaces":[{"name":"Declared runtime inputs","direction":"in","signal":"Stable matrix job, buffer identities and the stated device/visibility contract"},{"name":"Inspectable accepted or rejected result","direction":"out","signal":"Event trace, actual buffer values and bounded completion/work ledger"}],"science":[{"title":"A complete access must fit its declared range","equation":"The request starts at or above the range base, ends within its byte length, has permission, and uses the active mapping epoch.","explanation":"The model requires exactly one matching translation. Ending at the upper boundary is valid; crossing it is rejected.","assumptions":"Positive integer request length, declared sixteen-byte ranges and a sixteen-bit device address mask. No physical IOMMU page granularity is inferred."},{"title":"A wrong alias changes the computed operation","equation":"The default B-to-A alias computes [[7,10],[15,22]] instead of [[19,22],[43,50]].","explanation":"The outcome follows from actual device input arrays. All reads pass range and permission checks in this scenario.","assumptions":"Only the displayed default matrices and B-to-A mapping; some other matrices could coincidentally produce equal results."}],"engineeringExample":"With default A and B, correct mappings yield [[19,22],[43,50]]. The B→A alias transfers 32 input bytes and completes eight MACs, yielding [[7,10],[15,22]] without any protection rejection. The absent-B case instead transfers A’s 16 bytes, rejects B’s first word, executes zero MACs and publishes nothing. An ownership or mapping diagnostic should report these as distinct failures.","learningObjective":"Predict the different numerical and transfer outcomes of a permitted wrong alias and an absent device mapping.","misconception":"A successful translation proves only its stated address/permission contract; it does not prove tensor identity.","check":{"question":"The B IOVA maps to readable A storage. What does this specimen do?","options":["Always faults because the logical names differ","Computes with A as both operands, then exposes a result mismatch","Automatically finds B from the mathematical reference"],"answer":1,"explanation":"The translation unit checks its table. The device consumes the actual transferred A values."},"checks":[],"whyAI":"Custom accelerator drivers and graph runtimes manage many buffers and aliases. Correct tensor shapes and valid addresses must remain associated with the right storage throughout lowering and dispatch.","tradeoff":"Permission checks constrain access while identity checks protect meaning. Stronger software tracking is useful, but this experiment does not establish malicious-device isolation, replay protection or an operating-system security boundary.","evidenceNotes":"Primary sources establish the cited runtime mechanisms. Numerical values, address ranges, ABI strings, event schedule and reset/retry epochs are authored teaching contracts. No real device, firmware image, operating-system driver, page table, cache protocol or security verification is executed.","sourceIds":["runtime-linux-dma-616"],"sources":[{"title":"Linux 6.16 — Dynamic DMA mapping Guide","url":"https://docs.kernel.org/6.16/core-api/dma-api-howto.html"}],"workedTrace":{"modelVersion":"commissioning-execution-1","scenario":"wrong-mapping","expected":{"finalOutput":[[7,10],[15,22]],"readBytes":32,"executedMacs":8,"rejectedActions":0}},"level":"software","branch":"Executable software","subbranch":"Commissioning and runtime boundaries","scale":"One process and device job; logical states and byte addresses, no timing or physical geometry","kind":"system","workstream":"N12","visualFamily":"software-flow","labId":"library","investigationId":"execution","labScope":"The commissioning-execution-1 studio executes this bounded 2×2 matrix, buffer and completion contract. The surrounding atlas scene is conceptual; it is not a firmware emulator or system simulator.","history":[]}