{"id":"crg-package-system-closure","level":"system","name":"Package and system preserve the contract","shortName":"Package-system closure","role":"Carries chip interfaces through bonding, boards, racks, facilities and runtime services.","description":"The chip is one participant in a larger communication graph. Bumps, interposers, substrates, power delivery, thermal interfaces, host memory, network fabrics and software runtimes determine whether the die can sustain its intended work. A package can pass electrical test yet fail a thermal or mechanical boundary; a rack can contain tested parts yet lack commissioned power or a compatible data path. CRG therefore continues past tapeout to package and system closure, where interface budgets, workload traces, recovery and useful retained output are measured together.","specs":[{"label":"Closure boundaries","value":"Die, package, board, rack, hall and workload","context":"Each boundary has its own units and acceptance test."},{"label":"Useful output","value":"Work retained under stated quality, latency and energy targets","context":"Busy hardware alone is not the output metric."}],"interfaces":[{"name":"Die/package interfaces","direction":"in","signal":"Bumps, PHYs, power and thermal paths"},{"name":"Operating workload","direction":"out","signal":"Measured throughput, latency, recovery and quality"}],"tradeoff":"Closer integration reduces some communication distance while increasing assembly, thermal, test and replacement coupling.","whyAI":"Large models expose the full chain: HBM traffic, collective links, power conversion, cooling, storage and recovery all shape useful progress.","related":["crg-chip-design-realization","gpu-die","hbm-stack","package-substrate","rack","checkpoint"],"sources":[{"title":"TSMC CoWoS technology","url":"https://3dfabric.tsmc.com/english/dedicatedFoundry/technology/cowos.htm"},{"title":"NVIDIA DGX GB200 hardware guide","url":"https://docs.nvidia.com/dgx/dgxgb200-user-guide/hardware.html"}],"scale":"Package → node → rack → hall → workload","kind":"system","mechanism":["Match die interfaces to package routing, bonding, power and thermal budgets.","Test the package and integrate it on a board with host, memory and I/O paths.","Commission racks, fabric, cooling and facility services at declared boundaries.","Load data and schedule a workload through compiler, runtime and communication paths.","Measure retained work, errors, recovery and quality over the operating interval."],"misconception":"A package specification or rack capacity number is not evidence of useful model work without a workload and readiness boundary.","check":{"question":"What does system closure add after tapeout?","options":["Only a larger logo","Package, power, cooling, communication, runtime and workload evidence","Nothing, because a simulated chip is already a data center"],"answer":1,"explanation":"Useful computation depends on the complete operating path, not just a logical die."},"science":[{"title":"Useful-work boundary","equation":"W_{useful}=W_{executed}\\,q\\,(1-f_{lost})","explanation":"A bounded accounting model multiplies executed work by a quality/acceptance fraction q and the fraction not lost to interruption or recovery.","assumptions":"q and f_lost are measured for the declared task and interval; this is not a universal availability equation."}],"history":[],"prerequisites":["crg-chip-design-realization","package-substrate","rack"],"learningObjective":"Trace a chip interface through package and infrastructure boundaries to a retained workload result.","workstream":"CRG","visualFamily":"hall-system","engineeringExample":"A rack can have 64 tested packages yet deliver no useful training step when facility power is uncommissioned, HBM supply is incomplete, or the collective fabric cannot meet the workload’s synchronization bound.","evidenceNotes":"Public product and package pages describe representative boundaries; exact fleet configurations, allocation and service telemetry remain configuration-specific.","labId":"library","scope":"Use the manufacturing investigation to trace compatible inputs, assembly and operating constraints; no current standalone calculator models this lesson’s full mechanism.","investigationId":"manufacturing","labScope":"Use the manufacturing investigation to trace compatible inputs, assembly and operating constraints; no current standalone calculator models this lesson’s full mechanism."}