{"id":"compute-tray","level":"rack","name":"GB200 compute tray","shortName":"Compute tray","role":"Packages CPU–GPU compute and local support hardware into a serviceable rack unit.","description":"The compute tray is a physical execution unit within the rack. In the documented GB200 NVL72 example, each one-unit tray contains two Grace CPUs and four Blackwell GPUs, organized as two Grace Blackwell Superchips. Local support includes networking, storage, management, and cold plates. Short CPU–GPU links serve a different role from the NVLink switch network that joins GPUs across trays. The atlas slides out one tray and expands its boards so viewers can follow those boundaries without mistaking a CPU–GPU module for the entire rack. The tray also connects to shared power and cooling systems. Its compute hardware remains dependent on these external services even when shown as an isolated assembly.","specs":[{"label":"GB200 tray example","value":"4 GPUs + 2 Grace CPUs","context":"Two GB200 Superchips in one compute tray."},{"label":"Rack height","value":"1U","context":"Documented DGX GB200 compute-tray form factor."},{"label":"CPU–GPU link","value":"NVLink-C2C","context":"Local coherent interface; distinct from rack NVLink switching."}],"interfaces":[{"name":"Rack services","direction":"in","signal":"Electrical power, coolant, network traffic, and commands"},{"name":"Accelerated work","direction":"out","signal":"Computed tensors and communication with peer trays"}],"tradeoff":"Modular trays aid integration and service. Dense local packaging leaves constrained space for connections and cooling.","whyAI":"A tray contains the arithmetic and memory working on model partitions. Its local interfaces shape how those partitions obtain data.","related":["rack","nvlink-switch","cable-cartridge","cdu","power-shelf","cuda","compute-baseboard"],"sources":[{"title":"NVIDIA — DGX GB200 SuperPOD Components","url":"https://docs.nvidia.com/dgx-superpod/reference-architecture-scalable-infrastructure-gb200/latest/dgx-superpod-components.html"}],"scale":"1U rack module; components enlarged in cutaway","kind":"compute-tray","mechanism":["Connect CPU and GPU resources within each Superchip.","Join two Superchips and support interfaces in the tray.","Attach the tray to rack-wide communication, power, and coolant infrastructure."],"misconception":"Two GB200 Superchips contain four GPUs and two CPUs; a Superchip is not a synonym for a single GPU.","check":{"question":"How many Blackwell GPUs are in the illustrated GB200 compute tray?","options":["One","Four","Seventy-two"],"answer":1,"explanation":"The documented tray contains two Superchips, each combining two Blackwell GPUs and one Grace CPU."},"branch":"Rack integration","subbranch":"Compute modules","science":[{"title":"Reference-system composition","equation":"18 trays × 4 GPUs/tray = 72 GPUs; 18 × 2 CPUs/tray = 36 CPUs","explanation":"Counting at explicit assembly boundaries prevents confusion between a GPU, a Superchip, a tray, and a rack. The same boundaries define service and communication domains.","assumptions":"Documented one-rack GB200 NVL72 example only; other products and configurations differ."}],"history":[],"prerequisites":["compute-baseboard"],"learningObjective":"Translate a named rack’s tray configuration into component counts without treating packaging levels as interchangeable.","engineeringExample":"For the cited GB200 NVL72 reference, 18 compute trays × 4 GPUs per tray = 72 GPUs, while 18 × 2 CPUs per tray = 36 CPUs. The 18 trays are not 18 GPUs, and the GPU count is not a count of all underlying logic dies.","evidenceNotes":"These counts apply to the documented one-rack GB200 NVL72 configuration already cited in the lesson. They do not describe every rack product or predict installed, available or productive capacity.","labId":"library","scope":"Use the manufacturing investigation to trace compatible inputs, assembly and operating constraints; no current standalone calculator models this lesson’s full mechanism.","investigationId":"manufacturing","labScope":"Use the manufacturing investigation to trace compatible inputs, assembly and operating constraints; no current standalone calculator models this lesson’s full mechanism."}