{"id":"chip-volume-economics","level":"compute","name":"Custom-chip volume economics","shortName":"Custom-chip volume economics","role":"Compares lifecycle costs per useful result under explicit volume and performance assumptions.","description":"A custom accelerator can reduce recurring system cost while adding substantial development obligations. Non-recurring engineering includes design, verification, masks, software enablement and possible respins. Recurring cost includes usable silicon, memory, packaging, test, boards and operation. Chiplets can improve reuse or process choice, yet introduce links and package costs. The Chiplet Actuary research supplies a cost-model structure, not current commercial prices. The decisive denominator is useful delivered work over the product’s life. A lower chip purchase price can be overwhelmed by poor utilization, a shorter useful software lifetime or the need for more devices to satisfy the same service target.","specs":[{"label":"Fixed cost","value":"Currency per development program","context":"Amortize over delivered usable volume, with explicit accounting period."},{"label":"Variable cost","value":"Currency per qualified unit","context":"Include screening and assembly losses consistently, avoiding repeated yield penalties."}],"interfaces":[{"name":"Design and supply budgets","direction":"in","signal":"NRE, volume, screened component costs and qualification assumptions"},{"name":"Service economics","direction":"out","signal":"Lifecycle currency per useful result and break-even sensitivity"}],"tradeoff":"Specialization can lower cost at sufficient volume; uncertainty in demand, software portability and model evolution can prevent fixed costs from being recovered.","whyAI":"Custom silicon is justified by sustained useful workload advantage, so software development and delivered utilization belong beside die and package costs.","related":["chip-workload-contract","gpu-chiplet-locality","chip-tapeout-productization"],"sources":[{"title":"Chiplet Actuary: A Quantitative Cost Model and Multi-Chiplet Architecture Exploration","url":"https://arxiv.org/abs/2203.12268v4"}],"scale":"Register to storage hierarchy and product lifecycle","kind":"architecture","branch":"Custom silicon ecosystem","subbranch":"Memory choices and silicon economics","mechanism":["Separate one-time development and enablement costs from recurring qualified-unit and operating costs.","Use a consistent yield basis: costs of already-screened good dies should not receive the original wafer yield penalty again.","Estimate equivalent useful throughput under matched quality and service requirements for each alternative.","Amortize fixed costs over plausible delivered volume and useful life, including scenario-based respin or delay costs.","Vary volume, utilization and recurring savings to identify where the preferred design changes."],"misconception":"A smaller die or cheaper package alone does not establish cheaper AI service; the complete lifecycle and useful-work denominator matter.","check":{"question":"What happens to fixed development cost per unit when usable volume is halved?","options":["It doubles if fixed spending is unchanged","It halves automatically","It becomes an operating power cost"],"answer":0,"explanation":"The same fixed currency amount is divided among half as many qualified units."},"science":[{"title":"Simplified break-even volume","equation":"Nbreak = ΔNRE / Δc","explanation":"ΔNRE is additional fixed currency and Δc is positive recurring currency saved per equivalent useful unit; Nbreak is units.","assumptions":"Equal useful performance and lifetime; financing, timing, risk and operating-cost differences are excluded unless explicitly included in Δc."}],"prerequisites":["chip-workload-contract"],"learningObjective":"Calculate a bounded break-even scenario while identifying omitted lifecycle costs.","workstream":"W08","visualFamily":"memory-route","engineeringExample":"Synthetic example: an extra $30 million of development and $1,500 saved per equivalent usable unit breaks even at 20,000 units. If software reduces useful throughput, equivalent-unit savings must be recalculated before using that result.","evidenceNotes":"All money values are illustrative. Research cost coefficients are not 2026 quotes, and confidential foundry, memory and packaging contracts remain unknown.","labId":"engineering","scope":"Explore a synthetic partial cost budget with good-die supply, package yield and amortized development; product readiness and commercial contracts are not predicted.","deepLabId":"economics","investigationId":"manufacturing","labScope":"Explore a synthetic partial cost budget with good-die supply, package yield and amortized development; product readiness and commercial contracts are not predicted."}