{"id":"analog-photonic-research","level":"compute","name":"Analog and photonic arithmetic research","shortName":"Analog and photonic arithmetic research","role":"Explores physical multiply accumulation with explicit conversion and accuracy limits.","description":"In analog in-memory computing, stored conductance can encode a weight and an applied voltage can encode an input. Currents combine to form a multiply–accumulate result that must be sensed and often digitized. IBM has demonstrated mixed-signal phase-change-memory research chips using this principle. Photonic tensor-core research instead encodes and combines signals using optical components, with electronic interfaces still required around the computation. Both approaches can reduce certain data movements or exploit physical parallelism, but noise, drift, calibration, conversion and unsupported operations determine complete-system usefulness. Research demonstrations establish a mechanism and measured experiment, not automatic production readiness for large AI services.","specs":[{"label":"Evidence status","value":"Research demonstration","context":"Laboratory arithmetic is separate from a qualified deployed service."},{"label":"Accounting boundary","value":"Array plus converters, control and memory","context":"Laser or conversion energy must be counted where the architecture requires it."}],"interfaces":[{"name":"Encoded inputs and weights","direction":"in","signal":"Voltages/conductances or optical signals"},{"name":"Readout and digital control","direction":"out","signal":"Digitized results, calibration feedback and subsequent operations"}],"tradeoff":"Physical parallelism may reduce core arithmetic energy, while precision restoration, calibration and data conversion can consume much of the apparent benefit.","whyAI":"Inference tolerance to numerical error creates opportunities, but model quality and full operator coverage must survive real device variations.","related":["mac","quantization","chip-workload-contract"],"sources":[{"title":"An energy-efficient analog chip for AI inference","url":"https://research.ibm.com/blog/analog-ai-chip-inference"},{"title":"Parallel convolutional processing using an integrated photonic tensor core","url":"https://www.nature.com/articles/s41586-020-03070-1"}],"scale":"Network endpoint to wafer; electrical and optical views are conceptual","kind":"architecture","branch":"Processing architectures","subbranch":"Offload and research architectures","mechanism":["Choose how numerical values are represented by conductance, voltage or an optical signal.","Program weights and calibrate the physical response, including device variation and drift.","Perform the physical combination that approximates the desired matrix operation.","Sense and convert the result, accounting for noise and the precision required by the next stage.","Evaluate model quality and total energy including peripherals, communication and operations performed outside the analog or optical core."],"misconception":"Light does not make data movement or heat disappear, and an analog multiply–accumulate does not supply arbitrary exact digital arithmetic.","check":{"question":"What belongs in a fair analog-versus-digital energy comparison?","options":["Converters, control, memory traffic and achieved model quality","Only the crossbar’s current","Only the optical propagation time"],"answer":0,"explanation":"The complete task needs interfaces and acceptable outputs; excluding them can turn a component result into an unsupported system claim."},"science":[{"title":"Ideal conductance accumulation","equation":"Ij = Σi Gij Vi","explanation":"Gij is conductance in siemens, Vi voltage in volts and Ij current in amperes; the sum represents an ideal linear dot product.","assumptions":"Linear devices, negligible wire drops and ideal readout; real arrays require calibration and may use differential encoding."}],"prerequisites":["mac","quantization"],"learningObjective":"Distinguish a physical arithmetic demonstration from a complete production accelerator claim.","workstream":"W07","visualFamily":"architecture-array","engineeringExample":"Synthetic error budget: if sensing and weight drift each consume part of a permissible error margin, a larger array may need recalibration or wider digital correction even when its core operation is fast.","evidenceNotes":"The IBM and Nature sources describe particular research systems. No commercial deployment scale, universal energy advantage or precision equivalence is asserted.","labId":"library","scope":"Use the execution investigation for the shared tensor-to-memory-to-result thread; no current standalone calculator models this lesson’s full mechanism.","investigationId":"execution","labScope":"Use the execution investigation for the shared tensor-to-memory-to-result thread; no current standalone calculator models this lesson’s full mechanism."}