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  "title": "A documented rack as a system boundary",
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  "description": "Connects compute trays, switches, management, power and cooling in one named reference.",
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  "revisionDate": "2026-10-07",
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  "topic": "Chip-to-hall integration",
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      "title": "A documented rack as a system boundary",
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      "title": "Explore in Atlas",
      "url": "https://semiaifoundry.com/ai-atlas/#rack-reference-anatomy"
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    {
      "title": "NVIDIA DGX GB Rack Scale Systems: Hardware",
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      "title": "Integrated accelerator rack: GB200 NVL72 example",
      "url": "https://semiaifoundry.com/learn/atlas/rack/"
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      "title": "GB200 compute tray",
      "url": "https://semiaifoundry.com/learn/atlas/compute-tray/"
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    {
      "title": "NVLink switch tray and scale-up fabric",
      "url": "https://semiaifoundry.com/learn/atlas/nvlink-switch/"
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      "title": "Rack power conversion and distribution",
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  "content": "Chip-to-hall integration · Atlas v1.3.0\n\n# A documented rack as a system boundary\n\nConnects compute trays, switches, management, power and cooling in one named reference.\n\n[Explore in Atlas](https://semiaifoundry.com/ai-atlas/#rack-reference-anatomy)Package to rack and cluster; named reference geometry\n\nLearning objectiveRead a rack as converging physical and operational subsystems.\n\n## The mechanism\n\nA rack-scale accelerator system contains more than GPUs. Compute trays hold CPUs, accelerators, local memory and peripheral devices; switches connect an acceleration domain; management controllers support configuration and recovery. Power shelves and busbars distribute electricity, while manifolds deliver coolant to selected components. NVIDIA’s DGX GB rack guide supplies a concrete NVL72 reference with distinct compute and switch trays. The reference is useful because its interfaces are documented, not because every AI installation uses this design. A tray remains the same assembly when considered through its network, electrical and thermal connections, but each view describes a different service and constraint.\n\n1.  Identify the documented compute trays and their CPU/accelerator roles.\n2.  Trace the switch and cable paths that form the rack’s acceleration domain.\n3.  Locate separate management access for telemetry, recovery and configuration.\n4.  Follow power and coolant distribution without confusing their connections with data cables.\n5.  Verify the rack’s complete configuration and service dependencies before assigning workload capacity.\n\n## Science and assumptions\n\n### Component consistency\n\n$$\nN_{\\mathrm{GPU}}=N_{\\mathrm{tray}}N_{\\mathrm{GPU/tray}}\n$$\n\nTotal GPU count is the number of trays times GPUs per tray.\n\nSymbols and units\n\nN\\_GPU\n\nGPU count within the chosen assembly boundary\n\nGPUs\n\nN\\_tray\n\nNumber of uniform compute trays\n\ntrays\n\nN\\_GPU/tray\n\nGPU count per such tray\n\nGPUs/tray\n\nCounts are dimensionless hardware quantities; they do not establish tokens/s.\n\nAssumptions A uniform documented tray configuration; spare, disabled or service-reserved resources require separate accounting.\n\n## Engineering example\n\nThe documented 18 compute trays with four GPUs each account for 72 GPUs. This reconciles an inventory; it does not predict workload throughput, allocated capacity or electrical draw under every load.\n\n## Distinctions and tradeoffs\n\nA rack described as one large AI machine is not literally one GPU die or one unlimited coherent memory.\n\nRack integration increases local connectivity but concentrates service and facility requirements; maintenance may need coordinated management of many components.\n\nUseful capacity depends on the entire rack operating correctly, including networking and peripheral components that do not perform matrix multiplication.\n\n## Specifications and interfaces\n\nNamed boundary\n\nDGX GB NVL72 rack reference\n\nPreserve generation and system configuration in any numeric card.\n\nIndependent services\n\nCompute, data, management, power and cooling\n\nA working data link does not establish readiness of the other services.\n\n### Interfaces\n\nFacility services Input\n\nElectrical supply, coolant, cluster and management networks\n\nRack workload resources Output\n\nConnected compute with telemetry and cooling paths\n\n## Check your understanding\n\n### Why preserve a named reference configuration?\n\n1.  A rack name determines model quality\n2.  Its counts and interfaces have a defined evidence boundary\n3.  Every future rack must match it\n\nAnswer and reasoning\n\nIts counts and interfaces have a defined evidence boundary\n\nA reference makes the anatomy auditable while leaving alternatives and later revisions distinct.\n\n## Evidence and scope\n\nThe exact tray count is source-reported in the claims ledger. Mixed cooling and power details are specific to the reference, not universal rack standards.\n\nPropagate a stated facility power budget, PUE, readiness and utilization to illustrative work; detailed conversion, battery, cooling and grid models are not included.\n\n## Sources\n\n-   [NVIDIA DGX GB Rack Scale Systems: Hardware](https://docs.nvidia.com/dgx/dgxgb200-user-guide/hardware.html)\n\n[Published lesson data](https://semiaifoundry.com/ai-atlas/lesson-data/rack-reference-anatomy-ea8cb65c5ed019e3.json) · [Atlas releases and licensing](https://semiaifoundry.com/ai-atlas/licenses.html)\n\n## Continue exploring\n\n### Foundations\n\n-   [Integrated accelerator rack: GB200 NVL72 example](https://semiaifoundry.com/learn/atlas/rack/)\n-   [GB200 compute tray](https://semiaifoundry.com/learn/atlas/compute-tray/)\n\n### Related lessons\n\n-   [NVLink switch tray and scale-up fabric](https://semiaifoundry.com/learn/atlas/nvlink-switch/)\n-   [Rack power conversion and distribution](https://semiaifoundry.com/learn/atlas/rack-power-conversion/)"
}