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  "id": "atlas-lesson-network-adapter",
  "title": "Network interface adapter",
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  "format": "Atlas lesson",
  "description": "Moves data between the server and the cluster network, often with direct-memory and protocol offloads.",
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  "publishedDate": null,
  "revisionDate": "2026-10-07",
  "author": null,
  "topic": "Connectivity",
  "series": null,
  "license": null,
  "rightsUrl": "https://semiaifoundry.com/ai-atlas/licenses.html",
  "version": "1.3.0",
  "status": "Published educational lesson",
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      "id": "section-1",
      "title": "Network interface adapter",
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      "title": "The mechanism",
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      "title": "Small messages and large transfers have different bottlenecks",
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      "title": "Specifications and interfaces",
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      "title": "Check your understanding",
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      "title": "What does RDMA principally reduce in a supported transfer?",
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      "title": "Continue exploring",
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  "citations": [
    {
      "title": "Explore in Atlas",
      "url": "https://semiaifoundry.com/ai-atlas/#network-adapter"
    },
    {
      "title": "NVIDIA ConnectX Ethernet adapters",
      "url": "https://www.nvidia.com/en-us/networking/ethernet-adapters/"
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    {
      "title": "NVIDIA ConnectX-7 adapter hardware manual",
      "url": "https://networking-docs.nvidia.com/connectx7hw/introduction"
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      "url": "https://semiaifoundry.com/ai-atlas/lesson-data/network-adapter-2b661ddb0588a022.json"
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    {
      "title": "Atlas releases and licensing",
      "url": "https://semiaifoundry.com/ai-atlas/licenses.html"
    },
    {
      "title": "PCI Express interconnect",
      "url": "https://semiaifoundry.com/learn/atlas/pcie-interface/"
    },
    {
      "title": "NVLink GPU interface",
      "url": "https://semiaifoundry.com/learn/atlas/nvlink-port/"
    },
    {
      "title": "Host CPU",
      "url": "https://semiaifoundry.com/learn/atlas/host-cpu/"
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    {
      "title": "Compute baseboard and tray",
      "url": "https://semiaifoundry.com/learn/atlas/compute-baseboard/"
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      "title": "Leaf switch and endpoint network",
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  "content": "Connectivity · Atlas v1.3.0\n\n# Network interface adapter\n\nMoves data between the server and the cluster network, often with direct-memory and protocol offloads.\n\n[Explore in Atlas](https://semiaifoundry.com/ai-atlas/#network-adapter)Centimeter-scale adapter or module with external copper/optical links\n\nLearning objectiveSeparate fixed message startup time from payload transfer time on a network path.\n\n## The mechanism\n\nA NIC converts server memory transfers into network packets and receives packets from other machines. High-performance adapters can perform remote direct memory access, allowing registered buffers to be transferred with less involvement from the remote CPU. GPU-aware paths can also reduce unnecessary staging through host memory when the platform and software support them. These capabilities do not eliminate synchronization, congestion, or network topology. On a supported path, a tensor fragment leaves a GPU buffer, passes through the adapter and reaches a remote buffer; control and synchronization govern when the transfer is usable. The NIC belongs to the scale-out path between systems; it should not be confused with NVLink’s local GPU fabric or with the ordinary management network.\n\n1.  Software or a supported accelerator path identifies buffers and initiates a network operation.\n2.  The NIC reads data, applies the appropriate protocol processing, and transmits packets through the network.\n3.  The remote adapter places received data into supported buffers and reports completion so dependent work can continue.\n\n## Science and assumptions\n\n### Small messages and large transfers have different bottlenecks\n\n$$\nT_{\\mathrm{message}}\\approx\\alpha+\\frac{M}{B_{\\mathrm{payload}}}\n$$\n\nMessage time is approximately fixed startup latency plus payload size divided by sustained payload bandwidth.\n\nSymbols and units\n\nT\\_message\n\nMessage completion time in the path model\n\ns\n\nα\n\nFixed software/adapter/path startup latency\n\ns\n\nM\n\nPayload size\n\nbytes\n\nB\\_payload\n\nSustained directional payload bandwidth\n\nbytes/s\n\nα represents fixed software, adapter, and path latency; M is payload bytes; Bpayload is sustained payload bandwidth in bytes per second. For small M, startup dominates. For large M, bandwidth dominates. This explains why buying a faster line-rate adapter may help bulk gradient transfers more than tiny synchronization messages, and why scheduling and aggregation matter.\n\nAssumptions A single uncontended path and approximately constant startup cost. Congestion, multiple hops, retransmission, protocol offloads, and overlap can change both terms. Convert bits per second to bytes per second before comparing them.\n\n## Engineering example\n\nSynthetic uncontended transfer: α = 5 μs and payload bandwidth = 25 GB/s. A 1 MB message needs 40 μs of serialization, giving about 45 μs total. A 1 kB message needs only 0.04 μs of serialization but still about 5.04 μs total, so startup dominates.\n\n## Distinctions and tradeoffs\n\nA 400 Gb/s port is not a 400 GB/s port. Dividing by eight gives 50 GB/s before network and protocol overhead.\n\nFaster ports help only if the host path and network can sustain them. Queueing, congestion control, and placement can dominate tail latency even below the nominal line rate.\n\nDistributed training exchanges gradients and parameters across servers. Distributed inference and storage access also depend on efficient movement beyond one rack’s local GPU domain.\n\n## Specifications and interfaces\n\nConnectX-7 example\n\nUp to 400 Gb/s throughput\n\nNVIDIA adapter family rating; selected card and port modes vary.\n\nByte-rate equivalent\n\n50 GB/s at 400 Gb/s\n\nArithmetic conversion before protocol overhead; not 400 GB/s.\n\nAcceleration\n\nRDMA / RoCE and offloads\n\nAvailability depends on adapter, firmware, topology, and software.\n\n### Interfaces\n\nLocal memory transfer Input\n\nRegistered host or supported GPU buffers\n\nNetwork packets Output\n\nTensor, storage, and application traffic\n\nReceived packets Input\n\nRemote data and protocol responses\n\n## Check your understanding\n\n### What does RDMA principally reduce in a supported transfer?\n\n1.  The remote CPU’s work copying and processing the payload.\n2.  The number of bits in the model vocabulary.\n3.  The need for any network fabric.\n\nAnswer and reasoning\n\nThe remote CPU’s work copying and processing the payload.\n\nRDMA places data directly into registered memory with less remote CPU intervention. It still requires a functioning network, protocol, and synchronization.\n\n## Evidence and scope\n\nThe lesson’s latency-plus-payload model uses decimal bytes and one direction. These are synthetic rates; the linked network references do not make this a promise about RDMA, GPU access, congestion or any deployed adapter.\n\nVary ranks, payload, effective bandwidth and startup in an ideal ring all-reduce; this is not a topology-specific or every-collective traffic model.\n\n## Sources\n\n-   [NVIDIA ConnectX Ethernet adapters](https://www.nvidia.com/en-us/networking/ethernet-adapters/)\n-   [NVIDIA ConnectX-7 adapter hardware manual](https://networking-docs.nvidia.com/connectx7hw/introduction)\n\n[Published lesson data](https://semiaifoundry.com/ai-atlas/lesson-data/network-adapter-2b661ddb0588a022.json) · [Atlas releases and licensing](https://semiaifoundry.com/ai-atlas/licenses.html)\n\n## Continue exploring\n\n### Foundations\n\n-   [PCI Express interconnect](https://semiaifoundry.com/learn/atlas/pcie-interface/)\n\n### Related lessons\n\n-   [NVLink GPU interface](https://semiaifoundry.com/learn/atlas/nvlink-port/)\n-   [Host CPU](https://semiaifoundry.com/learn/atlas/host-cpu/)\n-   [Compute baseboard and tray](https://semiaifoundry.com/learn/atlas/compute-baseboard/)\n-   [Leaf switch and endpoint network](https://semiaifoundry.com/learn/atlas/leaf-switch/)"
}