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      "title": "Explore in Atlas",
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      "title": "NVIDIA CUDA — Floating-Point Computation and FMA",
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      "title": "Binary multiplier and partial-product reduction",
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      "title": "Full adder and carry network",
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  "content": "Arithmetic circuits · Atlas v1.3.0\n\n# Multiply–accumulate and fused arithmetic\n\nCombines products into the accumulated sums used by dot products and matrices.\n\n[Explore in Atlas](https://semiaifoundry.com/ai-atlas/#mac)Arithmetic datapath; exact size and throughput are implementation-specific\n\nLearning objectiveCompute a dot product as successive multiply–accumulate updates and declare the arithmetic format.\n\n## The mechanism\n\nA multiply–accumulate operation updates a running sum with a product. Repeating this pattern computes a dot product, and many dot products form a matrix multiplication. In floating-point hardware, a fused multiply-add computes a product plus an addend with one final rounding rather than separately rounding the product first. That numerical distinction matters: mathematically equivalent evaluation orders need not produce identical finite-precision results. The atlas shows operands entering a product path and a retained sum returning through a feedback path. It represents the operation's dependencies, not a vendor's internal tensor-core layout. Precision, accumulation width, and throughput belong to a particular implementation and must be specified separately.\n\n1.  Multiply the two current operand values.\n2.  Combine their product with the accumulator according to the arithmetic format.\n3.  Retain or forward the new sum and repeat for the next dot-product term.\n\n## Science and assumptions\n\n### Dot product and matrix entry\n\n$$\ny=\\sum_k a_k b_k,\\qquad C_{ij}=\\sum_k A_{ik}B_{kj}\n$$\n\nA dot product sums pairwise products. A matrix-product entry sums left-matrix row i times right-matrix column j over their shared index k.\n\nSymbols and units\n\ny\n\nDot-product output\n\nproduct of operand units\n\naₖ,bₖ\n\nPaired dot-product operands\n\ndeclared operand units\n\nCᵢⱼ\n\nMatrix-product entry at row i and column j\n\nproduct of A and B element units\n\nAᵢₖ\n\nLeft-matrix element\n\nA element units\n\nBₖⱼ\n\nRight-matrix element\n\nB element units\n\ni,j,k\n\nValid row, column and reduction indices\n\ninteger indices\n\nA matrix multiplication entry is a dot product. Repeated multiply–accumulate operations combine the contributions while the dataflow determines which values can be reused.\n\nAssumptions Exact algebra shown; finite-precision evaluation order, rounding, overflow, and accumulation format affect computed values.\n\n## Engineering example\n\nWorked exact integer dot product: \\[2, −1, 3\\] · \\[4, 5, 2\\] = 8 − 5 + 6 = 9. Starting at zero, the accumulator holds 8, then 3, then 9. This requires three multiplications and two nontrivial additions; a hardware convention may count three MACs as six operations.\n\n## Distinctions and tradeoffs\n\nCounting a multiply–add as two FLOPs says nothing by itself about clock cycles, units, or achieved application throughput.\n\nLow precision can reduce hardware and data costs. Numerical error and accumulation behavior require evaluation.\n\nMAC patterns implement the dense linear algebra of AI. Reuse and parallel scheduling determine how efficiently the hardware stays busy.\n\n## Specifications and interfaces\n\nUpdate equation\n\nacc ← acc + a × b\n\nConceptual multiply–accumulate recurrence.\n\nFMA rounding\n\nOne final rounding\n\nFloating-point fused multiply-add semantic distinction.\n\nOperation count\n\nOften counted as 2 FLOPs\n\nOne multiply plus one add; not two clock cycles.\n\n### Interfaces\n\na, b, and accumulator Input\n\nOperands in a defined numeric format\n\nUpdated accumulator Output\n\nPartial or final dot-product result\n\n## Check your understanding\n\n### What distinguishes floating-point FMA from separately rounded multiply and add?\n\n1.  FMA never produces rounding error\n2.  FMA uses no multiplication\n3.  FMA has one final rounding rather than an intermediate product rounding\n\nAnswer and reasoning\n\nFMA has one final rounding rather than an intermediate product rounding\n\nThe fused operation preserves the product through the addition before rounding, which can change the numerical result.\n\n## Evidence and scope\n\nThe dot-product identity is exact; the linked floating-point discussion explains why FMA and separately rounded operations can differ. This integer example assumes enough range and does not demonstrate floating-point error.\n\nInspect row–column products and accumulated results in a small integer matrix; this does not simulate the individual gate network.\n\n## Sources\n\n-   [NVIDIA CUDA — Floating-Point Computation and FMA](https://docs.nvidia.com/cuda/cuda-programming-guide/05-appendices/mathematical-functions.html)\n\n[Published lesson data](https://semiaifoundry.com/ai-atlas/lesson-data/mac-7944bf0787592b72.json) · [Atlas releases and licensing](https://semiaifoundry.com/ai-atlas/licenses.html)\n\n## Continue exploring\n\n### Foundations\n\n-   [Binary multiplier and partial-product reduction](https://semiaifoundry.com/learn/atlas/multiplier/)\n-   [Full adder and carry network](https://semiaifoundry.com/learn/atlas/adder/)\n\n### Related lessons\n\n-   [Edge-triggered D flip-flop](https://semiaifoundry.com/learn/atlas/flipflop/)\n-   [Six-transistor static memory cell](https://semiaifoundry.com/learn/atlas/sram/)\n-   [Tensor Core matrix unit](https://semiaifoundry.com/learn/atlas/tensor-core/)"
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