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  "title": "DUV, EUV and high-NA imaging",
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  "description": "Explains the coupled resolution and focus consequences of wavelength and numerical aperture.",
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      "title": "DUV, EUV and high-NA imaging",
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      "title": "At fixed wavelength and model factors, what happens when NA increases?",
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      "title": "Explore in Atlas",
      "url": "https://semiaifoundry.com/ai-atlas/#lithography-resolution-focus"
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    {
      "title": "ASML — How microchips are made",
      "url": "https://www.asml.com/en/technology/all-about-microchips/how-microchips-are-made"
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    {
      "title": "MIT 6.152J — Micro/Nano Processing Technology lecture notes",
      "url": "https://ocw.mit.edu/courses/6-152j-micro-nano-processing-technology-fall-2005/pages/lecture-notes/"
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      "title": "ASML and imec — Joint High NA EUV Lithography Lab opens",
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      "title": "Lithography and pattern transfer",
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  "content": "Fabrication / Repeated operations · Atlas v1.3.0\n\n# DUV, EUV and high-NA imaging\n\nExplains the coupled resolution and focus consequences of wavelength and numerical aperture.\n\n[Explore in Atlas](https://semiaifoundry.com/ai-atlas/#lithography-resolution-focus)Optical field to nanometer pattern; material states distinguished\n\nLearning objectiveInterpret resolution and focus scaling while preserving their limits.\n\n## The mechanism\n\nLithography creates an optical image within a finite process window. Shorter wavelength and larger numerical aperture can improve a resolution scale, but numerical aperture also affects depth of focus. DUV and EUV use different light-generation and optical arrangements; EUV relies on reflective optics and a controlled vacuum path. Higher-NA EUV changes the imaging system rather than changing silicon into a smaller element. Resist chemistry, stochastic events, masks, overlay and etch still determine which structures can be manufactured. This lesson compares optical bounds while keeping advertised node names separate from wavelength, pitch and final feature dimensions.\n\n1.  Choose a wavelength and optical system appropriate to the intended patterning route.\n2.  Form a mask image through finite-aperture optics and record the imaging conditions.\n3.  Compare resolution and focus sensitivity without interpreting them as a complete manufacturability prediction.\n4.  Measure resist geometry across focus and exposure, including defects and roughness.\n5.  Verify transferred geometry and overlay before accepting the layer integration.\n\n## Science and assumptions\n\n### Optical scaling\n\n$$\nR=k_1\\frac{\\lambda}{\\mathrm{NA}},\\qquad\\mathrm{DOF}=k_2\\frac{\\lambda}{\\mathrm{NA}^2}\n$$\n\nResolution scales with wavelength divided by numerical aperture. Depth of focus scales with wavelength divided by numerical aperture squared, each with its own process factor.\n\nSymbols and units\n\nR\n\nResolution under the selected definition\n\nnm\n\nDOF\n\nDepth of focus under the selected definition\n\nnm\n\nk₁,k₂\n\nProcess/definition-dependent coefficients\n\ndimensionless\n\nλ\n\nExposure wavelength\n\nnm\n\nNA\n\nNumerical aperture\n\ndimensionless\n\nR is a resolution length; DOF depth of focus. k₁ and k₂ depend on the process and definition.\n\nAssumptions Scaling relations, not a printable-design guarantee. Resist stochasticity, mask effects and pattern transfer are excluded.\n\n## Engineering example\n\nSynthetic comparison at fixed λ and k: raising NA by 20% reduces the resolution scale to 1/1.2 ≈ 0.833 and depth of focus to 1/1.2² ≈ 0.694 of their initial values.\n\n## Distinctions and tradeoffs\n\nA node label is not the exposure wavelength or a literal universal transistor dimension.\n\nHigher NA can improve resolution while narrowing focus tolerance and adding optical, mask and process-integration demands.\n\nSmaller reliable pitches can increase logic and memory density, but yield and process complexity determine useful capacity.\n\n## Specifications and interfaces\n\nOptical variables\n\nWavelength λ and numerical aperture NA\n\nλ has length units; NA is dimensionless.\n\nPrinted geometry\n\nLinewidth and pitch\n\nPitch is repeat distance, not necessarily feature width.\n\n### Interfaces\n\nMask and illumination Input\n\nPatterned optical field under a defined imaging system\n\nResist image Output\n\nGeometry with focus, dose and stochastic sensitivity\n\n## Check your understanding\n\n### At fixed wavelength and model factors, what happens when NA increases?\n\n1.  Only the chemical element changes\n2.  The resolution scale decreases and depth of focus decreases\n3.  Both resolution scale and depth of focus necessarily increase\n\nAnswer and reasoning\n\nThe resolution scale decreases and depth of focus decreases\n\nThe usual scaling relations depend on 1/NA for resolution and 1/NA² for depth of focus.\n\n## Evidence and scope\n\nRatios are illustrative, not a comparison of fully specified production scanners. High-NA demonstrations and production availability belong in separately dated evidence cards.\n\nVary wavelength and aperture in the Rayleigh resolution/focus model; stochastic defects and qualified tool configurations are not predicted.\n\n## Sources\n\n-   [ASML — How microchips are made](https://www.asml.com/en/technology/all-about-microchips/how-microchips-are-made)\n-   [MIT 6.152J — Micro/Nano Processing Technology lecture notes](https://ocw.mit.edu/courses/6-152j-micro-nano-processing-technology-fall-2005/pages/lecture-notes/)\n-   [ASML and imec — Joint High NA EUV Lithography Lab opens](https://www.asml.com/en/news/press-releases/2024/asml-imec-opening-high-na-euv-lithography-lab)\n\n[Published lesson data](https://semiaifoundry.com/ai-atlas/lesson-data/lithography-resolution-focus-6c6d86f32df07b06.json) · [Atlas releases and licensing](https://semiaifoundry.com/ai-atlas/licenses.html)\n\n## Continue exploring\n\n### Foundations\n\n-   [Lithography and pattern transfer](https://semiaifoundry.com/learn/atlas/lithography/)\n\n### Related lessons\n\n-   [Masks, OPC and pattern-aware design](https://semiaifoundry.com/learn/atlas/mask-opc-layout/)\n-   [Wafer finishing, orientation and geometry](https://semiaifoundry.com/learn/atlas/wafer-finishing-geometry/)"
}