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  "id": "atlas-lesson-hybrid-bond-surface-alignment",
  "title": "Hybrid bonding: surface state and alignment",
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  "description": "Joins dielectric surfaces and metal connections across a carefully prepared interface.",
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  "revisionDate": "2026-10-07",
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  "topic": "Packaging / Assembly and reliability",
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  "version": "1.3.0",
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      "id": "section-1",
      "title": "Hybrid bonding: surface state and alignment",
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      "title": "Check your understanding",
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      "title": "Why does a local surface particle matter beyond its own electrical conductivity?",
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    {
      "title": "Explore in Atlas",
      "url": "https://semiaifoundry.com/ai-atlas/#hybrid-bond-surface-alignment"
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    {
      "title": "imec — Wafer-to-wafer hybrid bonding: 400 nm interconnect pitch",
      "url": "https://www.imec-int.com/en/articles/wafer-wafer-hybrid-bonding-pushing-boundaries-400nm-interconnect-pitch"
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    {
      "title": "Cleaning and CMP as interface preparation",
      "url": "https://semiaifoundry.com/learn/atlas/clean-planarize-surface/"
    },
    {
      "title": "Microbumps, reflow and thermocompression",
      "url": "https://semiaifoundry.com/learn/atlas/bump-thermocompression-assembly/"
    },
    {
      "title": "SoIC and Foveros: vertical integration families",
      "url": "https://semiaifoundry.com/learn/atlas/soic-foveros-vertical-routes/"
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  "content": "Packaging / Assembly and reliability · Atlas v1.3.0\n\n# Hybrid bonding: surface state and alignment\n\nJoins dielectric surfaces and metal connections across a carefully prepared interface.\n\n[Explore in Atlas](https://semiaifoundry.com/ai-atlas/#hybrid-bond-surface-alignment)Joint surface, thin die and complete package; deformation exaggerated\n\nLearning objectiveConnect hybrid-bond surface preparation and alignment to joint integrity.\n\n## The mechanism\n\nHybrid bonding combines dielectric-to-dielectric attachment with metal-to-metal electrical connection. The interface needs appropriate topography and chemistry so the dielectric regions contact and the metal pads connect during the selected bonding and anneal sequence. CMP, cleaning, surface activation, alignment and controlled handling therefore become parts of the electrical interconnect problem. A particle or local recess can prevent contact across many nearby pads. Wafer-to-wafer demonstrations establish a result for particular surfaces and structures, not a universal production limit. This lesson links a measured bond surface to a selected joint cross-section and separates geometric alignment from electrical continuity and reliability.\n\n1.  Pattern and planarize the metal/dielectric surfaces to the requirements of the chosen bonding scheme.\n2.  Clean and activate surfaces while tracking exposure and handling history.\n3.  Align matching structures and initiate the dielectric bonding contact.\n4.  Apply the compatible post-bond thermal sequence to complete the intended interface and metal connections.\n5.  Evaluate voids, alignment, electrical chains and stress behavior on identified samples.\n\n## Science and assumptions\n\n### Square-pad overlap model\n\n$$\nA_{\\mathrm{overlap}}=\\max(0,w-|\\delta x|)\\max(0,w-|\\delta y|)\n$$\n\nSquare-pad overlap is width minus the absolute horizontal offset, floored at zero, times width minus the absolute vertical offset, floored at zero.\n\nSymbols and units\n\nA\\_overlap\n\nGeometric overlap of equal square pads\n\nμm²\n\nw\n\nPad side width\n\nμm\n\nδx\n\nRelative horizontal pad displacement\n\nμm\n\nδy\n\nRelative vertical pad displacement\n\nμm\n\nSquare pad width w and offsets δx,δy use the same length unit; overlap area uses length².\n\nAssumptions Geometric model for equal square pads. Electrical contact, dielectric breakdown, recess and bonding physics are not predicted by overlap alone.\n\n## Engineering example\n\nSynthetic geometry: equal 1 μm square pads offset by 0.2 μm in each direction retain 0.64 μm² overlap. This 64% geometric overlap is not a 64% bonding yield.\n\n## Distinctions and tradeoffs\n\nA reported research pitch does not automatically specify a qualified production overlay limit or transferable anneal recipe.\n\nSmaller pitch enables more connections per area but makes surface defects, overlap and dielectric spacing more demanding.\n\nDense vertical links can move data with shorter paths, while their surface requirements connect CMP and cleaning directly to integration yield.\n\n## Specifications and interfaces\n\nInterface\n\nDielectric bond plus metal connection\n\nBoth roles must be satisfied in the selected process.\n\nMeasurements\n\nRoughness, recess, overlay, voids and resistance\n\nEach has a different physical meaning and measurement method.\n\n### Interfaces\n\nPrepared matching surfaces Input\n\nTopography, cleanliness and aligned pad/dielectric layout\n\nBonded interface Output\n\nMechanical attachment and dense electrical connections\n\n## Check your understanding\n\n### Why does a local surface particle matter beyond its own electrical conductivity?\n\n1.  Only conductive particles affect bonding\n2.  Bonding always melts the entire dielectric\n3.  It can hold surrounding surfaces apart and interrupt multiple joints\n\nAnswer and reasoning\n\nIt can hold surrounding surfaces apart and interrupt multiple joints\n\nMechanical separation around a particle can create a bond void that spans several nearby connection sites.\n\n## Evidence and scope\n\nimec’s 400 nm-pitch result is research on specified Cu/SiCN structures. Its stated overlay and thermal conditions are not applied as generic production limits.\n\nUse the manufacturing investigation to trace compatible inputs, assembly and operating constraints; no current standalone calculator models this lesson’s full mechanism.\n\n## Sources\n\n-   [imec — Wafer-to-wafer hybrid bonding: 400 nm interconnect pitch](https://www.imec-int.com/en/articles/wafer-wafer-hybrid-bonding-pushing-boundaries-400nm-interconnect-pitch)\n-   [Besi — Scientific publications](https://www.besi.com/scientific-publications/)\n\n[Published lesson data](https://semiaifoundry.com/ai-atlas/lesson-data/hybrid-bond-surface-alignment-9002a9c90b03210c.json) · [Atlas releases and licensing](https://semiaifoundry.com/ai-atlas/licenses.html)\n\n## Continue exploring\n\n### Foundations\n\n-   [Cleaning and CMP as interface preparation](https://semiaifoundry.com/learn/atlas/clean-planarize-surface/)\n-   [Microbumps, reflow and thermocompression](https://semiaifoundry.com/learn/atlas/bump-thermocompression-assembly/)\n\n### Related lessons\n\n-   [SoIC and Foveros: vertical integration families](https://semiaifoundry.com/learn/atlas/soic-foveros-vertical-routes/)\n-   [Contamination and the state of a surface](https://semiaifoundry.com/learn/atlas/contamination-and-surface-state/)"
}