# Metal gate and high-k dielectric

Canonical: https://semiaifoundry.com/learn/atlas/gate-stack/
Revision: 2026-10-07
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Device physics · Atlas v1.3.0

# Metal gate and high-k dielectric

Couples a control voltage into the channel while suppressing gate leakage.

[Explore in Atlas](https://semiaifoundry.com/ai-atlas/#gate-stack)Nanometer-scale layered stack; layers expanded for visibility

Learning objectiveExplain why equivalent oxide thickness is a stack property.

## The mechanism

The gate stack contains a conducting electrode separated from the semiconductor by a thin dielectric system. It controls channel charge capacitively rather than requiring intentional conduction through the gate insulator. Making traditional silicon dioxide extremely thin improved control but increased tunneling leakage. High-k materials allow a physically thicker dielectric while preserving strong electrical coupling, and metal electrodes avoid the depletion associated with older polysilicon gates. The atlas lets the gate and dielectric peel apart to make their distinct roles clear. Effective oxide thickness is an electrical comparison, not necessarily the physical thickness of the complete stack. Actual material combinations and interfaces depend on a particular manufacturing process.

1.  Place a conducting gate electrode across an insulating layer from the channel.
2.  Apply a voltage so the stack capacitively changes channel charge.
3.  Balance useful gate coupling with tunneling leakage, interface quality, and reliability.

## Science and assumptions

### Capacitance and equivalent oxide thickness

$$
C^{\prime}=\frac{\varepsilon_0 k}{t},\qquad \mathrm{EOT}\approx t_{\mathrm{HK}}\frac{k_{\mathrm{SiO_2}}}{k_{\mathrm{HK}}}
$$

Capacitance per area equals permittivity divided by thickness. Equivalent oxide thickness is high-k thickness times the silicon-dioxide to high-k permittivity ratio.

Symbols and units

C′

Dielectric capacitance per area

F/m²

ε₀

Vacuum permittivity

F/m

k

Relative permittivity of the layer

dimensionless

t

Physical layer thickness

m

EOT

Equivalent silicon-dioxide thickness

m

t\_HK

Physical high-k layer thickness

m

k\_SiO₂

Relative permittivity of silicon dioxide

dimensionless

k\_HK

Relative permittivity of the high-k layer

dimensionless

High permittivity permits a physically thicker dielectric with comparable electrical coupling. For several dielectric layers, inverse capacitances add, so interfacial films also matter.

Assumptions Uniform linear dielectric layers in a series-capacitor approximation; ignores quantum capacitance and additional interface effects.

## Engineering example

A high-k film can be physically thicker than SiO₂ while giving a similar capacitance density; interface quality and leakage still matter.

## Distinctions and tradeoffs

Equivalent oxide thickness is an electrical comparison and need not equal the physical thickness of a high-k gate stack.

Stronger coupling improves control. Leakage, interface quality, and reliability limit aggressive dielectric scaling.

Efficient switching helps fit more operations within a power budget. Gate-stack engineering supports that hardware efficiency.

## Specifications and interfaces

High-k example

Hafnium-based dielectric

Commercial high-k/metal-gate introduction documented by Intel in 2007.

Useful coupling

Capacitance

Gate field controls channel charge.

Thickness distinction

EOT ≠ physical stack thickness

Equivalent oxide thickness is an electrical measure.

### Interfaces

Gate signal Input

Electrode voltage

Channel field Output

Capacitive electrostatic control

## Check your understanding

### Why can a high-k gate dielectric help?

1.  It requires the gate to short into the channel
2.  It can retain strong capacitive control with a physically thicker insulator
3.  It removes every source of transistor leakage

Answer and reasoning

It can retain strong capacitive control with a physically thicker insulator

Higher permittivity can preserve useful capacitance while easing the leakage problem of an extremely thin conventional dielectric.

## Historical context

### 2007 · High-k and metal gates enter Intel’s 45 nm generation

Hafnium-based dielectric and metal electrodes addressed leakage and gate-control limits of thinning silicon dioxide and polysilicon. The 45 nm name identifies the process generation.

[Intel — High-k and Metal Gate Research](https://www.intel.com/pressroom/kits/advancedtech/doodle/ref_HiK-MG/high-k.htm)

## Evidence and scope

EOT is an electrostatic comparison, not a complete physical thickness specification.

Use the switching investigation to connect physical charge, circuit load and arithmetic; the numerical library has no standalone model of this lesson’s full mechanism.

## Sources

-   [Intel — High-k and Metal Gate Transistor Research](https://www.intel.com/pressroom/kits/advancedtech/doodle/ref_HiK-MG/high-k.htm)

[Published lesson data](https://semiaifoundry.com/ai-atlas/lesson-data/gate-stack-70bfec722beb409b.json) · [Atlas releases and licensing](https://semiaifoundry.com/ai-atlas/licenses.html)

## Continue exploring

### Foundations

-   [Metal–oxide–semiconductor field-effect transistor](https://semiaifoundry.com/learn/atlas/mosfet/)
-   [Insulators and low-k films](https://semiaifoundry.com/learn/atlas/dielectric/)

### Related lessons

-   [Controllable semiconductor channel](https://semiaifoundry.com/learn/atlas/channel/)
-   [Gate-all-around nanosheet transistor](https://semiaifoundry.com/learn/atlas/gaa/)
-   [Lithography and pattern transfer](https://semiaifoundry.com/learn/atlas/lithography/)