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  "content": "· Atlas v1.3.0\n\n# Architecture is a contract between computation and silicon\n\nChooses execution, memory and communication structures that can satisfy a workload contract.\n\n[Explore in Atlas](https://semiaifoundry.com/ai-atlas/#crg-architecture-contract)Graph, architecture, tile and memory hierarchy\n\nLearning objectiveCompare two architectures by execution model, memory path and communication behavior rather than by a single peak number.\n\n## The mechanism\n\nArchitecture turns a computation graph into a repeatable organization of execution units, storage levels, interconnects and control. A CPU, GPU, TPU, FPGA, NPU or wafer-scale array realizes similar mathematical operations through different communication patterns and scheduling rules. The CRG view asks which state is retained, where it moves, who controls it, and what happens when a path is full or a unit fails. Architecture is therefore a contract: software assumes a set of behaviors, while implementation must satisfy those behaviors within power, area, timing, test and manufacturing limits.\n\n1.  Extract operator shapes, precision, reuse and synchronization from the workload.\n2.  Choose an execution model and dataflow that expose useful parallelism.\n3.  Allocate registers, local storage, shared memory and external memory roles.\n4.  Specify communication, ordering, fault and recovery behaviors.\n5.  Pass the contract to the compiler, RTL and physical-design teams.\n\n## Science and assumptions\n\n### Workload-bound rate\n\n$$\nR\\le\\min\\!\\left(P_{\\mathrm{compute}},B_{\\mathrm{memory}}I,B_{\\mathrm{network}}I_{\\mathrm{net}}\\right)\n$$\n\nCompatible work rate is bounded by the smallest arithmetic, memory-delivery and network-delivery rate after each is expressed on the same operation basis.\n\nIf the desired output is tasks/s rather than operations/s, normalize all three bounds by the same declared operations per task before comparison.\n\nSymbols and units\n\nR\n\nCompatible arithmetic/work rate under the declared operation convention\n\noperations/s\n\nP\\_compute\n\nArithmetic capacity in that same convention\n\noperations/s\n\nB\\_memory\n\nUseful memory payload bandwidth\n\nbytes/s\n\nI\n\nUseful operations per byte crossing the memory boundary\n\noperations/byte\n\nB\\_network\n\nUseful network payload bandwidth\n\nbytes/s\n\nI\\_net\n\nUseful operations per byte crossing the network boundary\n\noperations/byte\n\nA simple bound compares arithmetic capacity with memory and network delivery capacity after expressing each as a compatible workload rate.\n\nAssumptions Peak terms, arithmetic intensity and network intensity share a precision, batch and time boundary.\n\n## Engineering example\n\nA tensor kernel with low arithmetic intensity may remain memory-bound on a larger accelerator. Changing tile reuse or placing data closer to the unit can raise useful rate without changing the mathematical graph.\n\n## Distinctions and tradeoffs\n\nAn architecture label does not determine workload performance without a compiler path, memory behavior, topology and operating boundary.\n\nMore specialization can improve efficiency for a stable graph while reducing flexibility and increasing software or qualification effort.\n\nThe architecture determines whether model-scale tensor traffic becomes useful work or a queue of waiting memory and communication requests.\n\n## Specifications and interfaces\n\nContract axes\n\nExecution, storage, communication, control, recovery\n\nA comparison must use the same workload and boundary.\n\nUnknowns\n\nUndisclosed internal structures remain unknown\n\nPublic architecture claims are not reverse-engineered geometry.\n\n### Interfaces\n\nWorkload graph Input\n\nOperators, shapes, precision and dependencies\n\nImplementation plan Output\n\nUnits, memory hierarchy, links, schedules and budgets\n\n## Check your understanding\n\n### What does the architecture contract connect?\n\n1.  Only the transistor count and logo\n2.  The workload’s required state transitions with execution, storage and communication behavior\n3.  Only a benchmark score\n\nAnswer and reasoning\n\nThe workload’s required state transitions with execution, storage and communication behavior\n\nArchitecture defines how the computation can be carried by a machine under its physical and software constraints.\n\n## Evidence and scope\n\nThe bound is a roofline-style teaching model. Public architecture documentation supplies examples, not a universal product ranking.\n\nUse the manufacturing investigation to trace compatible inputs, assembly and operating constraints; no current standalone calculator models this lesson’s full mechanism.\n\n## Sources\n\n-   [OpenXLA — GPU architecture](https://openxla.org/xla/gpu_architecture)\n-   [Google Cloud TPU architecture](https://cloud.google.com/tpu/docs/system-architecture)\n\n[Published lesson data](https://semiaifoundry.com/ai-atlas/lesson-data/crg-architecture-contract-d109480e64f2bce5.json) · [Atlas releases and licensing](https://semiaifoundry.com/ai-atlas/licenses.html)\n\n## Continue exploring\n\n### Foundations\n\n-   [Communication is the realization medium](https://semiaifoundry.com/learn/atlas/crg-communication-graph/)\n-   [Streaming multiprocessor](https://semiaifoundry.com/learn/atlas/streaming-multiprocessor/)\n\n### Related lessons\n\n-   [Tensor Core matrix unit](https://semiaifoundry.com/learn/atlas/tensor-core/)\n-   [Host CPU](https://semiaifoundry.com/learn/atlas/host-cpu/)\n-   [Compiler, intermediate code, and device executable](https://semiaifoundry.com/learn/atlas/compiler/)"
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