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  "id": "atlas-lesson-cowos-r-l-routing",
  "title": "CoWoS-R and CoWoS-L: RDL and local silicon",
  "category": "learning",
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  "description": "Distinguishes polymer/copper redistribution from RDL combined with dense local silicon links.",
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  "publishedDate": null,
  "revisionDate": "2026-10-07",
  "author": null,
  "topic": "Packaging / Interposers, bridges and stacking",
  "series": null,
  "license": null,
  "rightsUrl": "https://semiaifoundry.com/ai-atlas/licenses.html",
  "version": "1.3.0",
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    {
      "id": "section-1",
      "title": "CoWoS-R and CoWoS-L: RDL and local silicon",
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      "title": "The mechanism",
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      "title": "Dense-routing footprint accounting",
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      "title": "Specifications and interfaces",
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      "title": "Check your understanding",
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      "title": "Which feature distinguishes the CoWoS-L description from an RDL-only interposer?",
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      "title": "Continue exploring",
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      "title": "Foundations",
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      "title": "Related lessons",
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  "citations": [
    {
      "title": "Explore in Atlas",
      "url": "https://semiaifoundry.com/ai-atlas/#cowos-r-l-routing"
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    {
      "title": "TSMC — CoWoS",
      "url": "https://3dfabric.tsmc.com/english/dedicatedFoundry/technology/cowos.htm"
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    {
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    {
      "title": "CoWoS-S and the silicon interposer route",
      "url": "https://semiaifoundry.com/learn/atlas/cowos-s-silicon-interposer/"
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    {
      "title": "Redistribution layers and fan-out packaging",
      "url": "https://semiaifoundry.com/learn/atlas/rdl-fanout-integration/"
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    {
      "title": "EMIB and localized die-to-die bridges",
      "url": "https://semiaifoundry.com/learn/atlas/emib-local-bridge/"
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    {
      "title": "Underfill, warpage, thermal paths and qualification",
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  "content": "Packaging / Interposers, bridges and stacking · Atlas v1.3.0\n\n# CoWoS-R and CoWoS-L: RDL and local silicon\n\nDistinguishes polymer/copper redistribution from RDL combined with dense local silicon links.\n\n[Explore in Atlas](https://semiaifoundry.com/ai-atlas/#cowos-r-l-routing)Multi-die package to selected joint; not dimensionally identical alternatives\n\nLearning objectiveIdentify the material and routing differences among CoWoS-S, R and L.\n\n## The mechanism\n\nCoWoS-R and CoWoS-L are different routing arrangements within TSMC’s package family. CoWoS-R uses an RDL interposer composed of polymer and copper routing. CoWoS-L combines an RDL-based interposer with embedded local silicon interconnects where denser connections are needed. These distinctions change the geometry and material system compared with a broad silicon interposer. A useful comparison keeps the same logic and memory endpoints while exposing where each route carries dense signals and distributes power. Larger package capability alone does not establish better yield, lower cost or interchangeable production capacity; those require a complete configuration and manufacturing boundary.\n\n1.  Hold the compute and memory endpoint requirements fixed for the route comparison.\n2.  For CoWoS-R, identify the polymer/copper RDL interposer that connects those endpoints.\n3.  For CoWoS-L, place local silicon interconnects at dense-link locations and connect the wider RDL network.\n4.  Integrate compatible dies and substrate connections while controlling alignment and material deformation.\n5.  Compare complete routing, power, thermal, test and manufacturing requirements rather than one advertised package dimension.\n\n## Science and assumptions\n\n### Dense-routing footprint accounting\n\n$$\nA_{\\mathrm{dense}}=\\sum_i A_{\\mathrm{local},i},\\qquad f_{\\mathrm{dense}}=\\frac{A_{\\mathrm{dense}}}{A_{\\mathrm{package}}}\n$$\n\nDense-routing area is the sum of its local regions. Dividing by package area gives the footprint fraction.\n\nSymbols and units\n\nA\\_dense\n\nTotal dense-routing area counted without overlap\n\nmm²\n\nA\\_local,i\n\nArea of dense-routing region i\n\nmm²\n\nA\\_package\n\nPackage area using the same footprint convention\n\nmm²\n\nf\\_dense\n\nDense-routing area fraction\n\ndimensionless\n\ni\n\nIncluded region index\n\ninteger index\n\nAreas use the same unit and fraction is dimensionless.\n\nAssumptions Geometric bookkeeping only; lower dense-silicon area does not directly predict cost, yield, bandwidth or capacity.\n\n## Engineering example\n\nSynthetic diagram: four local routing pieces of 10 mm² total 40 mm² inside a 1,000 mm² package outline. The 4% area fraction describes placement only; it is not a 96% cost or yield improvement.\n\n## Distinctions and tradeoffs\n\nCoWoS-S, CoWoS-R and CoWoS-L are not merely three names for identical geometry.\n\nConcentrating fine routing locally can reduce the need for a broad fine-routing silicon plane while adding placement and heterogeneous-material integration tasks.\n\nAs accelerators need more logic and memory within a package, routing location and material choices become system design decisions.\n\n## Specifications and interfaces\n\nCoWoS-R\n\nPolymer/copper RDL interposer\n\nA routing construction, not the same as a full silicon interposer.\n\nCoWoS-L\n\nRDL plus local silicon interconnects\n\nDense local silicon and wider-area redistribution have different roles.\n\n### Interfaces\n\nLogic, memory and routing components Input\n\nCompatible endpoints and route-specific fabricated structures\n\nIntegrated routing assembly Output\n\nDense local links plus package-wide signal/power paths\n\n## Check your understanding\n\n### Which feature distinguishes the CoWoS-L description from an RDL-only interposer?\n\n1.  All memory is fabricated inside the logic die\n2.  Embedded local silicon interconnects for dense links\n3.  The absence of any conductive routing\n\nAnswer and reasoning\n\nEmbedded local silicon interconnects for dense links\n\nCoWoS-L combines local high-density silicon routing with a broader RDL-based structure.\n\n## Evidence and scope\n\nPublic route definitions are checked; variant-specific tool capacity and customer queues are unknown. Production-history dates remain separate evidence entries.\n\nUse the manufacturing investigation to trace compatible inputs, assembly and operating constraints; no current standalone calculator models this lesson’s full mechanism.\n\n## Sources\n\n-   [TSMC — CoWoS](https://3dfabric.tsmc.com/english/dedicatedFoundry/technology/cowos.htm)\n\n[Published lesson data](https://semiaifoundry.com/ai-atlas/lesson-data/cowos-r-l-routing-25bc7a96656b0649.json) · [Atlas releases and licensing](https://semiaifoundry.com/ai-atlas/licenses.html)\n\n## Continue exploring\n\n### Foundations\n\n-   [CoWoS-S and the silicon interposer route](https://semiaifoundry.com/learn/atlas/cowos-s-silicon-interposer/)\n-   [Redistribution layers and fan-out packaging](https://semiaifoundry.com/learn/atlas/rdl-fanout-integration/)\n\n### Related lessons\n\n-   [EMIB and localized die-to-die bridges](https://semiaifoundry.com/learn/atlas/emib-local-bridge/)\n-   [Underfill, warpage, thermal paths and qualification](https://semiaifoundry.com/learn/atlas/package-thermomechanical-reliability/)"
}
