# GB200 compute tray

Canonical: https://semiaifoundry.com/learn/atlas/compute-tray/
Revision: 2026-10-07
Rights: https://semiaifoundry.com/ai-atlas/licenses.html

Rack integration · Atlas v1.3.0

# GB200 compute tray

Packages CPU–GPU compute and local support hardware into a serviceable rack unit.

[Explore in Atlas](https://semiaifoundry.com/ai-atlas/#compute-tray)1U rack module; components enlarged in cutaway

Learning objectiveTranslate a named rack’s tray configuration into component counts without treating packaging levels as interchangeable.

## The mechanism

The compute tray is a physical execution unit within the rack. In the documented GB200 NVL72 example, each one-unit tray contains two Grace CPUs and four Blackwell GPUs, organized as two Grace Blackwell Superchips. Local support includes networking, storage, management, and cold plates. Short CPU–GPU links serve a different role from the NVLink switch network that joins GPUs across trays. The atlas slides out one tray and expands its boards so viewers can follow those boundaries without mistaking a CPU–GPU module for the entire rack. The tray also connects to shared power and cooling systems. Its compute hardware remains dependent on these external services even when shown as an isolated assembly.

1.  Connect CPU and GPU resources within each Superchip.
2.  Join two Superchips and support interfaces in the tray.
3.  Attach the tray to rack-wide communication, power, and coolant infrastructure.

## Science and assumptions

### Reference-system composition

$$
\begin{aligned}18\,\mathrm{trays}\times4\,\mathrm{GPUs/tray}&=72\,\mathrm{GPUs}\\18\,\mathrm{trays}\times2\,\mathrm{CPUs/tray}&=36\,\mathrm{CPUs}\end{aligned}
$$

In the stated reference, 18 trays with four GPUs each contain 72 GPUs. The same 18 trays with two CPUs each contain 36 CPUs.

Symbols and units

18 trays

Compute-tray count in the named GB200 NVL72 reference

trays

4 GPUs/tray

GPU count per reference compute tray

GPUs/tray

2 CPUs/tray

CPU count per reference compute tray

CPUs/tray

Counting at explicit assembly boundaries prevents confusion between a GPU, a Superchip, a tray, and a rack. The same boundaries define service and communication domains.

Assumptions Documented one-rack GB200 NVL72 example only; other products and configurations differ.

## Engineering example

For the cited GB200 NVL72 reference, 18 compute trays × 4 GPUs per tray = 72 GPUs, while 18 × 2 CPUs per tray = 36 CPUs. The 18 trays are not 18 GPUs, and the GPU count is not a count of all underlying logic dies.

## Distinctions and tradeoffs

Two GB200 Superchips contain four GPUs and two CPUs; a Superchip is not a synonym for a single GPU.

Modular trays aid integration and service. Dense local packaging leaves constrained space for connections and cooling.

A tray contains the arithmetic and memory working on model partitions. Its local interfaces shape how those partitions obtain data.

## Specifications and interfaces

GB200 tray example

4 GPUs + 2 Grace CPUs

Two GB200 Superchips in one compute tray.

Rack height

1U

Documented DGX GB200 compute-tray form factor.

CPU–GPU link

NVLink-C2C

Local coherent interface; distinct from rack NVLink switching.

### Interfaces

Rack services Input

Electrical power, coolant, network traffic, and commands

Accelerated work Output

Computed tensors and communication with peer trays

## Check your understanding

### How many Blackwell GPUs are in the illustrated GB200 compute tray?

1.  One
2.  Four
3.  Seventy-two

Answer and reasoning

Four

The documented tray contains two Superchips, each combining two Blackwell GPUs and one Grace CPU.

## Evidence and scope

These counts apply to the documented one-rack GB200 NVL72 configuration already cited in the lesson. They do not describe every rack product or predict installed, available or productive capacity.

Use the manufacturing investigation to trace compatible inputs, assembly and operating constraints; no current standalone calculator models this lesson’s full mechanism.

## Sources

-   [NVIDIA — DGX GB200 SuperPOD Components](https://docs.nvidia.com/dgx-superpod/reference-architecture-scalable-infrastructure-gb200/latest/dgx-superpod-components.html)

[Published lesson data](https://semiaifoundry.com/ai-atlas/lesson-data/compute-tray-b65ff15b5c9539eb.json) · [Atlas releases and licensing](https://semiaifoundry.com/ai-atlas/licenses.html)

## Continue exploring

### Foundations

-   [Compute baseboard and tray](https://semiaifoundry.com/learn/atlas/compute-baseboard/)

### Related lessons

-   [Integrated accelerator rack: GB200 NVL72 example](https://semiaifoundry.com/learn/atlas/rack/)
-   [NVLink switch tray and scale-up fabric](https://semiaifoundry.com/learn/atlas/nvlink-switch/)
-   [NVLink copper cable cartridge](https://semiaifoundry.com/learn/atlas/cable-cartridge/)
-   [Coolant distribution unit and separated loops](https://semiaifoundry.com/learn/atlas/cdu/)
-   [Rack power shelf and DC busbar](https://semiaifoundry.com/learn/atlas/power-shelf/)
-   [CUDA programming and runtime layer](https://semiaifoundry.com/learn/atlas/cuda/)