# Cleaning and CMP as interface preparation

Canonical: https://semiaifoundry.com/learn/atlas/clean-planarize-surface/
Revision: 2026-10-07
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Fabrication / FEOL and MOL · Atlas v1.3.0

# Cleaning and CMP as interface preparation

Removes residues and topography while controlling loss, shape and defects.

[Explore in Atlas](https://semiaifoundry.com/ai-atlas/#clean-planarize-surface)Nanometer device cross-sections; reference flow with alternatives

Learning objectiveRelate CMP and cleaning measurements to the next required interface.

## The mechanism

Fabrication repeatedly creates surfaces that the next operation cannot use directly. Cleaning removes selected residues or contaminants; chemical mechanical planarization combines surface chemistry and mechanical interaction to reduce topography or remove an overburden. These tasks meet at the final interface but are not interchangeable. CMP can leave particles, scratches, dishing or erosion, and a post-CMP clean must preserve the films it exposes. A wafer-average removal rate can hide a locally recessed conductor or remaining material. This lesson connects incoming topography, pad and slurry state, endpoint, local pattern density and post-clean inspection to the actual surface handed downstream.

1.  Map incoming thickness and pattern density before evaluating the polishing result.
2.  Combine material-specific surface reactions with pad contact to remove exposed material.
3.  Track endpoint and local removal rather than relying on average elapsed time.
4.  Clean residues with a method compatible with all newly exposed films.
5.  Measure topography and defects at relevant sites and distinguish incoming variation from process-induced change.

## Science and assumptions

### Preston-type removal model

$$
\mathrm{RR}=KPV
$$

The local empirical removal model multiplies the Preston coefficient, pressure and relative speed.

Symbols and units

RR

Local material removal rate

m/s

K

Empirical Preston coefficient for these units

Pa⁻¹

P

Local pressure

Pa

V

Relative sliding speed

m/s

RR is removal rate in m/s, P pressure in Pa, V relative speed in m/s; K then has units Pa⁻¹.

Assumptions Empirical local approximation. Pad state, chemistry, material, pattern density and contact mechanics make K non-universal.

## Engineering example

Synthetic map: two wafers have the same average removal, but one has a locally recessed metal region. The average cannot decide bonding readiness; site-resolved topography distinguishes the cases.

## Distinctions and tradeoffs

High removal rate does not establish good planarization, low dishing or low defectivity.

More polishing can clear a residual film but deepen dishing, erode surrounding material or increase defects.

Planarity supports repeated interconnect layers and intimate hybrid-bond contact, linking a wafer operation to package yield.

## Specifications and interfaces

CMP responses

Removal, uniformity, dishing, erosion, defects

Separate response variables measured at named spatial scales.

Surface readiness

Residual film and local topography

The next layer or bond sets the requirement; no universal limit is implied.

### Interfaces

Incoming film/topography Input

Pattern density, overburden and contamination state

Prepared interface Output

Measured topography and cleaned exposed materials

## Check your understanding

### Average film thickness meets target, but bonding opens cluster over dense wiring. What is the next useful evidence?

1.  A larger die count
2.  Local topography and surface-condition measurements tied to those sites
3.  Only the global removal-rate average

Answer and reasoning

Local topography and surface-condition measurements tied to those sites

Local shape and chemistry can control contact even when a global thickness target is satisfied.

## Evidence and scope

Illustrative coefficients, defect maps and acceptance ranges are not production tolerances. A spatial association does not prove a CMP root cause.

Compare nominal and local removal-rate extremes at a shared polish time; dishing, erosion and bond readiness are not predicted.

## Sources

-   [imec — Wafer-to-wafer hybrid bonding: 400 nm interconnect pitch](https://www.imec-int.com/en/articles/wafer-wafer-hybrid-bonding-pushing-boundaries-400nm-interconnect-pitch)
-   [Lam Research — Our Processes](https://www.lamresearch.com/products/our-processes/)
-   [KLA — Chip Manufacturing 101](https://www.kla.com/wp-content/uploads/ChipManufacturing101.pdf)

[Published lesson data](https://semiaifoundry.com/ai-atlas/lesson-data/clean-planarize-surface-b4aee2df6719e290.json) · [Atlas releases and licensing](https://semiaifoundry.com/ai-atlas/licenses.html)

## Continue exploring

### Foundations

-   [Chemical mechanical planarization](https://semiaifoundry.com/learn/atlas/cmp/)
-   [Contamination and the state of a surface](https://semiaifoundry.com/learn/atlas/contamination-and-surface-state/)

### Related lessons

-   [BEOL layers, damascene and vias](https://semiaifoundry.com/learn/atlas/beol-damascene-vias/)
-   [Hybrid bonding: surface state and alignment](https://semiaifoundry.com/learn/atlas/hybrid-bond-surface-alignment/)